XC2V40 PDF Datasheet


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Description

This is Field-Programmable Gate Arrays. 0 R Virtex-II 1.5V Field-Programmable Gate Arrays 0 0 DS031-1 (v1.7) October 2, 2001 Advance Product Specification Summary of Virtex®-II Features Industry First Platform FPGA Solution IP-Immersion™ Architecture - Densities from 40K to 8M system gates - 420 MH- internal clock speed (Advance Data) - 840+ Mb, s I, O (Advance Data) SelectRAM™ Memory Hierarchy - 3 Mb of True Dual-Port™ RAM in 18-Kbit block SelectRAM resources - Up to 1.5 Mb of distributed SelectRAM resources - High-performance interfaces to external memory · DDR-SDRAM interface · FCRAM interface · QDR™-SRAM interface · Sigma RAM interface Arithmetic Functions - Dedicated 18-bit x 18-bit multiplier blocks - Fast look-ahead carry logic chains Flexible Logic Resources - Up to 93,184 internal registers , latches with Clock Enable - Up to 93,184 look-up tables (LUTs) or cascadable 16-bit shift registers - Wide multiplexers and wide-input function support - Horizontal cascade chain and Sum-of-Products support - Internal.