P3055LD PDF Datasheet


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Description

This is N-Channel Logic Level Enhancement Mode Field Effect Transistor. NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor P3055LD TO-252 (DPAK) D PRODUCT SUMMARY V(BR)DSS 25 RDS(ON) 50mΩ ID 12A 1. GATE 2. DRAIN 3. SOURCE G S ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS, TEST CONDITIONS Gate-Source Voltage Continuous Drain Current Pulsed Drain Current Avalanche Energy Repetitive Avalanche Energy Power Dissipation 2 1 SYMBOL VGS LIMITS ±20 12 8 45 60 3 48 20 -55 to 150 275 UNITS V TC = 25 °C TC = 100 °C L = 0.1mH L = 0.05mH TC = 25 °C TC = 100 °C ID IDM EAS EAR PD Tj, Tstg TL A mJ W Operating Junction & Storage Temperature Range Lead Temperature ( , 16” from case for 10 sec.) THERMAL RESISTANCE RATINGS THERMAL RESISTANCE Junction-to-Case Junction-to-Ambient Case-to-Heatsink 1 2 1 °C SYMBOL RθJC RθJA RθCS TYPICAL MAXIMUM 3 75 UNITS °C , W 1 Pulse width limited by maximum junction temperature. Duty cycle ≤ 1% ELECTRICAL CHARACTERISTICS (TC = 25 .