LY6264 PDF Datasheet
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Description
This is 8K X 8 BIT LOW POWER CMOS SRAM. ®
LY6264
Rev. 2.6
8K X 8 BIT LOW POWER CMOS SRAM
REVISION HISTORY
Revision Rev. 1.0 Rev. 2.0 Rev. 2.1 Rev. 2.2 Rev. 2.3 Rev. 2.4 Rev. 2.5 Rev. 2.6 Description Initial Issue Revised Vcc Range 4.5~5.5V => 2.7~5.5V Revised ISB1 Adding PKG type : skinny P-DIP Revised VIH(min)=2.4V, VIL(max)=0.6V Revised VIH(min)=2.4V, VIL(max)=0.6V (VCC=2.7~3.6V) VIH(min)=2.4V, VIL(max)=0.8V (VCC=4.5~5.5V) Revised STSOP Package Outline Dimension Added SL grade Added ISB1, IDR values when TA = 25℃ and TA = 40℃ Revised FEATURES & ORDERING INFORMATION Lead free and green package available to Green package available Added packing type in ORDERING INFORMATION Revised ISB1(MAX) Revised VTERM to VT1 and VT2 Revised Test Condition of ISB1, IDR Deleted TSOLDER in ABSOLUTE MAXIMUN RATINGS Issue Date Jul.25.2004 May.3.2005 May.13.2005 Aug.29.2005 Feb.24.2006 Jul.31.2006 Mar.26.2008 Mar.30.2009
Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, .