H5DU2562GFR PDF Datasheet
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Description
This is 256Mb DDR SDRAM.
256Mb DDR SDRAM
H5DU2562GFR
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 1.1 , Sep. 2009 1
H5DU2562GFR
Revision History
Revision No. 0.1 0.2 1.0 1.1 History Preliminary Revised tRC, tWR spec @ DDR500 Release Revised Operating Frequency Draft Date Jun. 2009 Jun. 2009 Jul. 2009 Sep. 2009 Remark
Rev. 1.1 , Sep. 2007
2
H5DU2562GFR
DESCRIPTION
The H5DU2562GFR is a 268,435,456-bit CMOS Double Data Rate(DDR) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density and high bandwidth. This Hynix 256Mb DDR SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the , CK), Data, Dat.