CY7C199 PDF Datasheet


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Description

This is 32K x 8 Static RAM. CY7C199 32K x 8 Static RAM Features High speed 10 ns Fast tDOE CMOS for optimum speed, power Low active power 467 mW (max, 12 ns “L” version) Low standby power 0.275 mW (max, “L” version) 2V data retention (“L” version only) Easy memory expansion with CE and OE features TTL-compatible inputs and outputs Automatic power-down when deselected is provided by an active LOW Chip Enable (CE) and active LOW Output Enable (OE) and three-state drivers. This device has an automatic power-down feature, reducing the power consumption by 81% when deselected. The CY7C199 is in the standard 300-mil-wide DIP, SOJ, and LCC packages. An active LOW Write Enable signal (WE) controls the writing, reading operation of the memory. When CE and WE inputs are both LOW, data on the eight data input, output pins (I, O0 through I, O7) is written into the memory location addressed by the address present on the address pins (A0 through A14). Reading the device is accomplished by selecting the.