AD9364 PDF Datasheet
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Description
This is RF Agile Transceiver. Data Sheet
FEATURES
RF 1 × 1 transceiver with integrated 12-bit DACs and ADCs Band: 70 MH- to 6.0 GH- Supports time division duplex (TDD) and frequency division duplex (FDD) operation Tunable channel bandwidth (BW): <200 kH- to 56 MH- 3-band receiver: 3 differential or 6 single-ended inputs Superior receiver sensitivity with a noise figure of <2.5 dB Rx gain control Real-time monitor and control signals for manual gain Independent automatic gain control 2-band differential output transmitter Highly linear broadband transmitter Tx EVM: ≤ 40 dB Tx noise: ≤ 157 dBm, H- noise floor Tx monitor: ≥66 dB dynamic range with 1 dB accuracy Integrated fractional-N synthesizers 2.4 H- maximum local oscillator (LO) step size Multichip synchronization CMOS, LVDS digital interface
RXB_P, RXB_N RXA_P, RXA_N RXC_P, RXC_N TX_MON TXA_P, TXA_N TXB_P, TXB_N
RF Agile Transceiver AD9364
FUNCTIONAL BLOCK DIAGRAM
AD9364
DATA INTERFACE ADC Rx LO Tx LO DAC
P0_[D11:D0], TX_[D5:D0] P1_[D11:D0], RX_[D5:D0]
DAC
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