AD9361 PDF Datasheet
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Description
This is RF Agile Transceiver. Data Sheet
FEATURES
RF 2 × 2 transceiver with integrated 12-bit DACs and ADCs Band: 70 MH- to 6.0 GH- Supports TDD and FDD operation Tunable channel bandwidth: <200 kH- to 56 MH- Dual receivers: 6 differential or 12 single-ended inputs Superior receiver sensitivity with a noise figure of 2 dB at 800 MH- local oscillator (LO) RX gain control Real-time monitor and control signals for manual gain Independent automatic gain control Dual transmitters: 4 differential outputs Highly linear broadband transmitter TX EVM: ≤ 40 dB TX noise: ≤ 157 dBm, H- noise floor TX monitor: ≥66 dB dynamic range with 1 dB accuracy Integrated fractional-N synthesizers 2.4 H- maximum LO step size Multichip synchronization CMOS, LVDS digital interface
RX1B_P, RX1B_N RX1A_P, RX1A_N RX1C_P, RX1C_N RX2B_P, RX2B_N
RF Agile Transceiver AD9361
FUNCTIONAL BLOCK DIAGRAM
AD9361
ADC
ADC RX LO TX LO DAC
RX2C_P, RX2C_N TX_MON1 TX1A_P, TX1A_N TX1B_P, TX1B_N TX_MON2 TX2A_P, TX2A_N
ADC
DATA INTERFACE
RX2A_P, RX2A_N
P0_[D1.