AD8155 PDF Datasheet


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Description

This is 6.5 Gbps Dual Buffer Mux/Demux. 6.5 Gbps Dual Buffer Mux, Demux AD8155 FUNCTIONAL BLOCK DIAGRAM RECEIVE EQUALIZATION Ix_A[1:0] EQ 2:1 Ix_B[1:0] EQ Ox_C[1:0] TRANSMIT PREEMPHASIS FEATURES Dual 2:1 mux, 1:2 demux Optimized for dc to 6.5 Gbps NRZ data Per-lane P, N pair inversion for routing ease Programmable input equalization Compensates up to 40 inches of FR4 Loss-of-signal detection Programmable output preemphasis up to 12 dB Programmable output levels with squelch and disable Accepts ac-coupled or dc-coupled differential CML inputs 50 Ω on-chip termination 1:2 demux supports unicast or bicast operation Port-level loopback Port or single lane switching 1.8 V to 3.3 V flexible core supply User-settable I, O supply from VCC to 1.2 V Low power, typically 2.0 W in basic configuration 64-lead LFCSP 40°C to +85°C operating temperature range Ox_A[1:0] 1:2 Ox_B[1:0] DUAL 2:1 MULTIPLEXER, 1:2 DEMULTIPLEXER EQ Ix_C[1:0] TRANSMIT PREEMPHASIS RECEIVE EQUALIZATION SCL SDA I2C_A[2:0] I2C CONTROL LOGIC CONT.